JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPUR
B.Tech – II-I Sem L T P C
3 0 0 3
19A05301 DIGITAL LOGIC DESIGN (Common to CSE & IT)
Course Objectives:
- Understanding basic number systems, codes and logical gates.
- Acquiring the skills to manipulate and examine Boolean algebraic expressions, logical operations, and Boolean functions
- Acquainting with classical hardware design for both combinational and sequential logic circuits
- Experiencing about synchronous circuits.
- Obtaining the knowledge about various types of memories.
UNIT - I
Digital Systems and Binary Numbers:
Digital Systems, Binary Numbers, Number base conversions, Octal, Hexadecimal and other base numbers, complements, signed binary numbers, binary codes, binary storage and registers, binary logic. Boolean algebra and logic gates: Basic theorems and properties of Boolean algebra, Boolean functions, canonical and standard forms, Digital Logic Gates.
Unit Outcomes:
Student is able to
Summarize the binary number system
Illustrate various binary codes
Describe the basic postulates of Boolean Algebra
Develop a logic diagram using gates from a Boolean function
UNIT - II
Gate–Level Minimization:
The Map Method, Four-Variable K-Map, sum of products, product of sums simplification, Don’t care conditions, Simplification by Quine- McClusky Method, NAND and NOR implementation and other two level implementations, Exclusive-OR function.
Unit Outcomes:
Student is able to
Apply the map method for simplifying Boolean Expressions.
Apply Don’t care conditions to simplify a Karnaugh map.
Design two-level Boolean functions with NAND gates and NOR gates
UNIT - III
Combinational Logic:
Combinational Circuits, Analysis of Combinational Circuits, Design Procedure, Binary Adder-Subtractor, Decimal Adder, Binary Multiplier, Magnitude Comparator, Decoders, Encoders, Multiplexers and Demultiplexers.
Unit Outcomes:
Student is able to
Select fundamental combinational logic circuits.
Analyze and design combinational circuits.
Design Boolean function with a multiplexer.
UNIT - IV
Synchronous Sequential Circuits:
Latches, Flip-flops, analysis of clocked sequential circuits, Register and Counters: Registers, Shift registers, Ripple counters, Synchronous counters and other counters.
Unit Outcomes:
Student is able to
Explain the functionalities of latch and different flip-flops.
Analyze and design clocked sequential circuits.
Describe the use of sequential circuit components in complex digital systems.
UNIT - V
Memory and Programmable Logic:
Random-Access memory, Memory decoding, ROM, Programmable Logic Array, Programmable Array Logic, Sequential programmable devices. Digital Integrated Circuits: RTL and DTL Circuits, Transistor-Transistor Logic (TTL), EmitterCoupled Logic (ECL), MOS, CMOS Logic, Comparisons of Logic Families
Unit Outcomes:
Student is able to
Interpret the types of memories.
Construct the Boolean functions with PLA and PAL.
Describe the most common integrated circuit digital logic families. Course Outcomes: Students should be able to
Analyze the number systems and codes.
Decide the Boolean expressions using Minimization methods.
Design the sequential and combinational circuits.
Apply state reduction methods to solve sequential circuits.
Describe various types of memories.
TEXT BOOKS:
1. M. Morris Mano, M.D. Ciletti, “Digital Design”, 5th edition, Pearson, 2018.
REFERENCE BOOKS:
1. Donald P Leach, Albert Paul Malvino, Goutam Saha, “Digital Principles and applications”, Mc Graw Hill , 8th Edition,2015.
2. David J. Comer, “Digital Logic & State Machine Design”, Oxford University Press, 3rd Reprinted Indian Edition, 2012
3. R.D. Sudhakar Samuel, “Digital Logic Design”, Elsevier Publishers.
